Reliability Senior Manager

The company provides wafer and other service for Tier one companies and other worldwide customers.

Expertise on intrinsic reliability methodology such as TDDB/EM/SM
Experience on quality/reliability event engagement with customers
Be the expert in SORT and Final Test, test screening, test content, test coverage and test requirement specifications in order to perform product defective parts per million (DPPM) assessment.
Perform circuit design analysis, design-for-test analysis and design-in-failure analysis.
Debug testchip/product functionality.

MS or PhD degree in EE or related.
15+ years of experience in the semiconductor industry.
Familiarity with test coverage, test patent and test content generation.
Familiarity with test patterns and test contents in conjunction with circuit design or design-for-test or design-in-failure-analysis.
Familiarity with yield debug activities
Experience as a Product Engineer or Quality-and-Reliability Engineer.
Good project management skills.
Good communicate in English.