Company Overview

Our client is a global semiconductor test hardware company developing advanced interface solutions for next-generation semiconductor devices.

The team supports complex applications including AI, HPC, Mobile AP, RF, and advanced wafer-level testing, working with global semiconductor customers from early feasibility study through design, verification, manufacturing, and delivery.

Job Summary

The Hardware Design Engineer will develop advanced semiconductor test interface hardware for next-generation IC and ATE platforms.

This role combines circuit design, high-layer-count PCB development, SI/PI analysis, wafer-test interface architecture, DFM/DFA, and global project execution.

You will work closely with worldwide engineering teams, customers, and supply-chain partners to evaluate different hardware approaches and deliver solutions that balance performance, cost, lead time, and manufacturability.

Responsibilities

• Develop semiconductor test interface hardware solutions for next-generation devices.
• Analyze customer device-testing requirements and conduct technical feasibility studies.
• Compare multiple hardware approaches and recommend the optimal solution based on performance, cost, lead time, and risk.
• Design test circuits and complex high-layer-count PCB solutions for ATE Device Interface Boards.
• Support hardware development for AI, HPC, Mobile AP, RF, and other advanced semiconductor applications.
• Develop wafer-test interface solutions involving Substrate / MLO architectures.
• Evaluate Cost-of-Test optimization approaches, including substrate stack-up, TDE, and related design strategies.
• Perform board-level and system-level Signal Integrity (SI) and Power Integrity (PI) simulation.
• Conduct frequency-domain and time-domain analysis to validate hardware performance prior to fabrication.
• Collaborate with mechanical and PCB teams on mechanical integration, cable design, and thermal evaluation.
• Own hardware projects from requirement definition through design, verification, and final delivery.
• Perform technical risk assessment, schedule planning, design reviews, and quality verification.
• Work directly with internal and external global customers through regular technical reviews.
• Collaborate with global supply-chain partners to resolve DFM and DFA challenges.
• Improve product first-pass success rate and manufacturing robustness.
• Evaluate new technologies, materials, and architectures for next-generation semiconductor test solutions.
• Deliver technical presentations, design reviews, and training to customers when required.

Requirements

• Bachelor’s degree or above in Electrical Engineering, Electronics Engineering, Microelectronics, Communications, Mechatronics, Automation, Instrumentation, or a related engineering discipline. 

• Strong understanding of electronic circuit fundamentals. 

• Experience with circuit design and board-level hardware development. 

• Knowledge of multi-layer PCB design. 

• Familiarity with embedded system or complex board-level architecture. 

• Basic understanding of Signal Integrity and/or Power Integrity. 

• Ability to read schematics and understand PCB implementation. 

• Strong analytical and hardware troubleshooting skills. 

• Ability to solve complex PCB and hardware-design issues under tight schedules. 

• Good written and spoken English. 

• Strong communication and cross-functional collaboration skills. 

• Detail-oriented with strong ownership and execution capability. 

• Willingness to travel internationally when required. 

Preferred Qualifications 

• Experience using Cadence Allegro, OrCAD Capture, or equivalent PCB design tools. 

• Experience with high-layer-count or high-complexity PCB design. 

• Experience in semiconductor ATE test hardware. 

• Familiarity with DIB / Load Board / Probe Card / Wafer Test Interface development. 

• Knowledge of Substrate, MLO, interposer, or advanced packaging-related test hardware. 

• Experience with SI / PI simulation tools and methodology. 

• Familiarity with high-speed digital or RF circuit design. 

• Understanding of PCB stack-up, impedance control, differential routing, and PDN design. 

• Experience with AI, HPC, Mobile AP, RF, or other high-performance semiconductor devices. 

• Knowledge of wafer sort and final-test processes. 

• Customer-facing technical presentation or application-engineering experience. 

Ideal Candidate 

The ideal candidate is a hardware engineer who enjoys solving problems where Semiconductor Test, PCB Design, SI/PI, Mechanical Integration, and Manufacturing come together. 

They should be comfortable working through the complete development flow: 

Device Test Requirement → Feasibility Study → Hardware Architecture → Circuit / PCB Design → SI / PI → DFM / DFA → Verification → Customer Delivery 

This role is particularly suitable for engineers who want to move beyond conventional board design and build deeper expertise in advanced semiconductor test interface hardware.

Preferred Qualifications 

• Work on next-generation semiconductor devices across AI, HPC, Mobile AP, and RF applications. 

• Develop highly complex ATE and wafer-test hardware. 

• Gain exposure to SI/PI, advanced substrates, MLO, and high-layer-count PCB architectures. 

• Collaborate directly with global semiconductor customers and international engineering teams. 

• Own projects from initial requirement analysis through final hardware delivery. 

• Participate in new technology and material development for future semiconductor testing. 

Post Time｜2026/10/14